ADC12DL3200ACF RF-Sampling ADC 12-Bit Resolution Dual 3.2GSPS Channels 6.4GBaud Rate JESD204B Interface Multi-Band Operation Ultra-Low Power Wide

ADC12DL3200ACF RF-Sampling ADC 12-Bit Resolution Dual 3.2GSPS Channels 6.4GBaud Rate JESD204B Interface Multi-Band Operation Ultra-Low Power Wide Analog Bandwidth Integrated Digital Down-Conversion

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Features

andbull; ADC Core:

andnbsp; andndash; 12-Bit Resolution

andnbsp; andndash; Up to 6.4 GSPS in Single-Channel Mode

andnbsp; andndash; Up to 3.2 GSPS in Dual-Channel Mode

andbull; Internal Dither for Low-Magnitude, High-Order Harmonics

andbull; Low-Latency LVDS Interface:

andnbsp; andndash; Total Latency: andlt; 10 ns

andnbsp; andndash; Up to 48 Data Pairs at 1.6 Gbps

andnbsp; andndash; Four DDR Data Clocks

andnbsp; andndash; Strobe Signals Simplify Synchronization

andbull; Noise Floor (No Input, VFS = 1.0 VPP-DIFF):

andnbsp; andndash; Dual-Channel Mode: andndash;151.1 dBFS/Hz

andnbsp; andndash; Single-Channel Mode: andndash;154.3 dBFS/Hz

andbull; Buffered Analog Inputs With VCMI of 0 V:andndash; Analog Input Bandwidth (andndash;3 dB): 8.0 GHzandndash; Usable Input Frequency Range: andgt; 10 GHzandndash; Full-Scale Input Voltage (VFS, Default): 0.8 VPP

andbull; Noiseless Aperture Delay (TAD) Adjustment:

andnbsp; andndash; Precise Sampling Control: 19-fs Step

andnbsp; andndash; Simplifies Synchronization and Interleaving

andnbsp; andndash; Temperature and Voltage Invariant Delays

andbull; Easy-to-Use Synchronization Features:

andnbsp; andndash; Automatic SYSREF Timing Calibration

andnbsp; andndash; Timestamp for Sample Marking

andbull; Power Consumption: 3.15 W

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Applications

andbull; Oscilloscopes and Wideband Digitizers

andbull; Electronic Warfare (SIGINT, ELINT)

andbull; Time-of-Flight and LIDAR Distance Measurement

andbull; Microwave Backhaul

andbull; Automotive Radar Testers

andbull; Spectrometry

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Description

The ADC12DL3200 is an RF-sampling, giga-sample, analog-to-digital converter (ADC) that can directly sample input frequencies from DC to above 10 GHz. In dual-channel mode, the ADC12DL3200 can sample up to 3200 MSPS and in single-channel mode up to 6400 MSPS. Programmable tradeoffs in channel count (dual-channel mode) and Nyquist bandwidth (single-channel mode) allow development of flexible hardware that meets the needs of both high-channel count or wide instantaneous signal bandwidth applications. Full-power input bandwidth (andndash;3 dB) of 8.0 GHz and a useable frequency range allows direct RF sampling of L-band, S-band, C-band, and X-band for frequency agile systems.

The ADC12DL3200 uses a low-latency, low-voltage differential signaling (LVDS) interface for latency sensitive applications or when the simplicity of LVDS is preferred. The interface uses up to 48 data pairs, four double data rate (DDR) clocks, and four strobe signals arranged in four 12-bit data buses. The interface supports signaling rates of up to 1.6 Gbps. Strobe signals simplify synchronization across buses and between multiple devices. The strobe is generated internally and can be reset at a deterministic time by the SYSREF input. Multi device synchronization is further eased by innovative synchronization features such as noiseless aperture delay (TAD) adjustment and SYSREF windowing.

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INFORMATION

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Drawing

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12-bit RF-sampling ADC with JESD204B interface

dual 3.2GSPS ADC for multi-band operation

ultra-low power ADC with wide bandwidth

ADC12DL3200ACF RF-Sampling ADC 12-Bit Resolution Dual 3.2GSPS Channels 6.4GBaud Rate JESD204B Interface Multi-Band Operation Ultra-Low Power Wide Images